da9188.002 23 february 2005 1 (10) MAS9188 12 8-bit d to a converter ? 3-pin serial data interface ? low voltage output buffer ? replaces 12 potentiometers ? individually programmable outputs ? fully operational down to 1.2 v description MAS9188 is 12-channel 8-bit dac, designed primarily for trimmer replacement. the device is controlled by a simple 3-line input. the dac is selected with the four first bits in the serial input data (sdi-pin ) and the dac output value is set according to the last 8 bits in the serial input data. features applications ? twelve 8-bit dacs on a single monolithic chip ? voltage level output ? tssop-20 package ? single, low +1.2 v supply ? power-on reset ? functionally and pin compatible with ad8802/ad8804 ? high resolution monitors ? automatic gain control ? trimmer replacement ? portable and battery-operated equipment block diagram 8-bit dac 8-bit dac 8-bit dac 8-bit dac 8-bit dac 8-bit dac 8-bit dac o8 8-bit dac o7 o6 o5 o4 o3 o2 o1 vrefh vrefl 8-bit dac 8-bit dac 8-bit dac 8-bit dac o12 o11 o10 o9 clk sdi xcs vdd gnd 12-bit shift register a ddress decoder 8-bit data
da9188.002 23 february 2005 2 (10) pin configuration vrefh 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 o1 o2 o3 o4 o5 o6 xshdn xcs gnd ma s 9188a 1 vdd xreset o12 o11 o10 o9 o8 o7 sdi clk top view y y w w yyww = year, week vrefh 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 o1 o2 o3 o4 o5 o6 xshdn xcs gnd ma s 9188a 2 o12 o11 o10 o9 o8 o7 sdi clk y y w w vdd vrefl pin description pin number MAS9188 a1 MAS9188 a2 function 1 vrefh vrefh dac output reference high voltage 2 o1 o1 dac 1, address 0x0 3 o2 o2 dac 2, address 0x1 4 o3 o3 dac 3, address 0x2 5 o4 o4 dac 4, address 0x3 6 o5 o5 dac 5, address 0x4 7 o6 o6 dac 6, address 0x5 8 xshdn xshdn device analog part power-down signal (active low) 9 xcs xcs device enable signal (rising edge loads data to dac) 10 gnd gnd device ground-pin 11 clk vrefl data clock / dac output low reference voltage 12 sdi clk serial input data / data clock 13 o7 sdi dac 7, address 0x6 / serial input data 14 o8 o7 dac 8, address 0x7 / dac 7, address 0x6 15 o9 o8 dac 9, address 0x8 / dac 8, address 0x7 16 o10 o9 dac 10, address 0x9 / dac 9, address 0x8 17 o11 o10 dac 11, address 0xa / dac 10, address 0x9 18 o12 o11 dac 12, address 0xb / dac 11, address 0xa 19 xreset o12 device digital part reset ? middle code preset pin / dac 12, address 0xb 20 vdd vdd device power supply pin MAS9188 has two bonding options available: ? MAS9188a1, where vrefl pin is bonded to gnd pin and xreset pin can be used ? MAS9188a2, where xreset pin is bonded to vdd pin and vrefl pin can be used
da9188.002 23 february 2005 3 (10) absolute maximum ratings parameter symbol conditions min max unit power supply (vdd to gnd) vdd -0.3 6.0 v input voltage range (any other pin) -0.3 vdd + 0.3 v operating temperature range -40 +85 c storage temperature range -65 +150 c recommended operation conditions parameter symbol conditions min typ max unit supply voltage range vdd 1.2 3.6 5.5 v operating temperature range temp -40 +85 c electrical characteristics dc parameters digital inputs vdd = 2.4?5.5 v, vrefh = vdd, vrefl = 0 v, -40 c t a +85 c unless otherwise noted parameter symbol conditions min typ max unit dac resolution n 8 bits dac differential nonlinearity error dnl -1 +1 lsb dac integral nonlinearity error inl -1 +1 lsb dac full-scale error gfse -1 +1 lsb dac zero code error bzse -1 +1 lsb dac output resistance rout 3 5 8 k ? reference input vdd = 2.4?5.5 v, vrefh = vdd, vrefl = 0 v, -40 c t a +85 c unless otherwise noted parameter symbol conditions min typ max unit refh voltage range vrefh v refh > v refl 0 vdd refl voltage range (MAS9188a2 only) vrefl v refh > v refl 0 vdd refh input resistance rrefh 0.5 1.1 k ? refl input resistance rrefl 1.1 k ? rout matching ( ? r out /r out ) rmatch 0.4 2 %
da9188.002 23 february 2005 4 (10) digital input vdd = 2.4?5.5 v, vrefh = vdd, vrefl = 0 v, -40 c t a +85 c unless otherwise noted parameter symbol conditions min typ max unit digital logic high vih 0.7 vdd digital logic low vil 0.3 vdd digital input current iil 1 a power supplies vdd = 2.4?5.5 v, vrefh = vdd, vrefl = 0 v, -40 c t a +85 c unless otherwise noted parameter symbol conditions min typ max unit power supply range vdd 1.2 5.5 v supply current idd 0.01 5 a shutdown current ishdn 0.01 5 a ac parameters ac characteristics dynamic performance vdd = 2.4?5.5 v, vrefh = vdd, vrefl = 0 v, -40 c t a +85 c unless otherwise noted parameter symbol conditions min typ max unit power supply sensitivity ? v out ? v dd ? v dd = 1.1 v dd ? 0.9 v dd 0.12 % power supply sensitivity (100 hz) psrr 65 db vout settling time ( 1/2 lsb error band) ts 5 s crosstalk between adjacent outputs ct 50 db switching characteristics vdd = 3.6 v, vrefh = vdd, vrefl = 0 v, t a = +25 c unless otherwise noted parameter symbol conditions min typ max unit input clock high pulse width tch 17 ns input clock low pulse width tcl 8 ns data setup time tds -7 ns data hold time tdh 24 ns xcs fall to first clock pulse fall tclcl 18 ns xcs high pulse width tcsw 10 ns clk rise to xcs rise hold time tcsh 22 ns xcs rise to clock rise setup tcs1 7 ns reset pulse width trs 18 ns
da9188.002 23 february 2005 5 (10) operating modes dac maximum output voltage is set using vrefh and vrefl pins (= 255/256 * (vrefh-vrefl)+vrefl) (note: vrefl = gnd in case of MAS9188a1). the xreset pin is used for middle code preset: dac registers are reset and middle code will appear at the dac output. serial input data is written to sdi while xcs is low. data is read at clk rising edge to on-chip shift register. rising xcs-pin reads data and 12 clk-cycles are used as the input data (4 address bits and 8 data bits). the last 12 bits before rising xcs are used as input data. timing diagram application and test circuit information clock data in MAS9188a2 o8 o1 o2 o3 o4 o5 o6 o7 15 14 7 6 5 4 3 2 vrefh vrefl clk sdi 12 13 controller o12 o9 o10 o11 19 18 17 16 vdd gnd +3.0v 11 10 1 20 xcs chip select 9 8 xshdn 100 nf power on/off sdi a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 clk xcs dac register load v out
da9188.002 23 february 2005 6 (10) package (tssop-20) outlines symbol min nom max unit a -- -- 1.10 mm a1 0.05 -- 0.15 mm a2 0.85 0.90 0.95 mm b 0.19 -- 0.30 mm b1 0.19 0.22 0.25 mm c 0.09 -- 0.20 mm c1 0.09 -- 0.16 mm d 6.40 6.50 6.60 mm e 6.4 bsc mm e1 4.30 4.40 4.50 mm e 0.65 bsc mm l 0.50 0.60 0.75 mm l1 1.00 ref r 0.09 -- -- mm s -- 0.20 -- mm dimensions do not include mold or inte rlead flash, protrusions or gate burrs. reference standard : jedec mo-153 . b b r a a view a-a b b e e1 e a a2 a1 d b c c1 b1 gauge plane 0.25 view b-b 12 ref 12 ref l l1 s index area e/ 2
da9188.002 23 february 2005 7 (10) soldering information for for eutectic sn/pb tssop-20 resistance to soldering heat according to rsh test iec 68-2-58/20 2*220 c maximum temperature 240 c maximum number of reflow cycles 3 reflow profile thermal profile param eters stated in jesd22-a113 should not be exceeded. http://www.jedec.org seating plane co-planarity max 0.08 mm lead finish solder plate 7.62 - 25.4 m, material sn 85% pb 15% for green (pb free, rohs compliant) tssop-20 resistance to soldering heat acco rding to rsh test iec 68-2-58/20 maximum temperature 260 c maximum number of reflow cycles 3 reflow profile thermal profile param eters stated in ip c/jedec j-std-020 should not be exceeded. http://www.jedec.org seating plane co-planarity max 0.08 mm lead finish solder plate 7.62 - 25.4 m, material matte tin embossed tape specifications user direction of feed pin1 w a o p o p 2 p 1 d o x x e f b o t k o section x-x
da9188.002 23 february 2005 8 (10) dimension min/max unit a o 6.70 0.10 mm b o 6.90 0.10 mm d o 1.50 +0.1/-0.0 mm e 1.75 mm f 7.50 0.10 mm k o 1.30 0.10 mm p o 4.0 mm p 1 12.0 0.10 mm p 2 2.0 0.05 mm t 0.3 0.05 mm w 16.00 +0.30/-0.10 mm
da9188.002 23 february 2005 9 (10) reel specifications a b d w3 w2 c w1 n ? 2500 components on each reel ? reel material: conductive, plastic antistatic or static dissipative ? carrier tape material: conductive ? cover tape material: static dissipative cover tape carrier tape start end components leader trailer dimension min max unit a 330 mm b 1.5 mm c 12.80 13.50 mm d 20.2 mm n 50 mm w 1 (measured at hub) 16.4 18.4 mm w 2 (measured at hub) 22.4 mm trailer 160 mm leader 390, of which minimum 160 mm of empty carrier tape sealed with cover tape mm weight 1500 g
da9188.002 23 february 2005 10 (10) ordering information product code product package comments MAS9188aua1 12 x 8-bit d to a converter tssop-20 0 v reference level MAS9188aua2 12 x 8-bit d to a converter tssop-20 adjustable reference level MAS9188a1uc06 12 x 8-bit d to a converter tssop-20 pb free, rohs compliant 0 v reference level MAS9188a2uc06 12 x 8-bit d to a converter tssop-20 pb free, rohs compliant adjustable reference level local distributor micro analog systems oy contacts micro analog systems oy kamreerintie 2, p.o.box 51 fin-02771 espoo, finland tel. +358 9 80 521 fax +358 9 805 3213 http://www.mas-oy.com notice micro analog systems oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible pr oducts. micro analog systems oy assumes no responsibility for the use of any circ uits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and make s no claim that the circuits are free from patent infringem ent. applications for any devices shown in this data sheet are for illustration only and micro analog systems oy makes no claim or warranty that such applications w ill be suitable for the use specified without further testing or modification.
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